1. Field of the Invention
The present invention relates to a CDMA (Code Division Multiple Access) multi-user receiving apparatus for performing an interference canceling process in parallel for individual users on a plurality of stages and for outputting demodulated signals for the individual users on the last stage, in particular, to a multi-user receiving apparatus with excellent interference cancellation characteristics in a small hardware scale.
2. Description of the Related Art
CDMA system using direct sequence (DS) spreading process (hereinafter referred to as DS-CDMA system) has become attractive as a multiple access system for a mobile communication system having a base station and portable mobile stations because of the probability of remarkable increase of the subscriber capacity. In the DS-CDMA system, each user signal is spreaded in a wide frequency band with particular code and transmitted to a propagation path. On the receiver side, the code-multiplexed signal is de-spreaded and a desired signal is detected. When spreaded codes assigned to individual users correlate, they interfere and the reception characteristics deteriorate.
As an interference canceler, a multi-user receiving apparatus that cancels such interferences using spreaded codes of all users and characteristics of propagation paths is known. An example of such a multi-user receiving apparatus has been disclosed by M. K. Varanasi and B. Aashang "Multistage Detection in Asynchronous Code-Division Multiple-Access Communications", IEEE Trans, Commun., vol. COM-38, No. 4. pp. 509-519, April 1980. In the example, the first stage circuit demodulates all user signals, generates interference replicas of the user signals, and subtracts interference replicas other than an interface replica for a desired user signal from the received signal. The next stage circuit demodulates the desired user signal with the output signal of the first stage circuit. Thus, the demodulated result of the second stage circuit is improved in comparison with the demodulated result of the first stage circuit. In the multi-stage structure, the interference canceling process is repeated a plurality of times and thereby the interference cancellation characteristics are improved.
Another related art reference has been disclosed by Fukasawa, Satoh (T), Kawabe, and Satoh (S) "Structure and Characteristics of Interference Canceler Based on Estimation of Propagation Path Using Pilot Signal (translated title)" Journal of The Institute of Electronics, Information and Communication Engineers, Japan, B-II Vol. J77-B-II No. 11, November 1994. In the related art reference, an interference cancellation residual signal propagation structure is used to simplify the apparatus. In addition, a determination symbol for each user signal is treated as a replica. Thus, the hardware scale is reduced. However, in the detecting process on each stage, interfered propagation path characteristics estimated on the first stage are used. Thus, when an estimated error of a propagation path is large, the interference cancellation characteristics largely deteriorate.
In a recent year, a modification system of such a related art reference has been proposed. In the system, a propagation path is estimated on each stage rather than the first stage so as to suppress the deterioration of interference cancellation characteristics against a propagation path estimation error. Such a system has been disclosed by Sawahashi, Miki, Andoh, and Higuchi "Sequential Channel Estimation Type Serial Canceler Using Pilot Symbols in DS (Direct Sequence)--CDMA", The Institute of Electronics, Information and Communication Engineers, Japan, Wireless Communication System Study Group Technical Report, RCS95-50, July 1995. In the technical paper, a serial process structure for sequentially demodulating and canceling interferences of user signals in the order of higher reception signal levels is used. Another related art reference has been disclosed by Yoshida and Atokawa "Sequential Propagation Path Estimation Type CDMA Multi-Stage Interference Canceler Using Symbol Replica Process" The Institute of Electronics, Information and Communication Engineers, Japan, Wireless Communication System Study Group Technical Report, RCS96-171, February, 1997 (Japanese Patent Laid-Open Publication No. 10-51353). As with the system proposed by Fukasawa et. al., in the system proposed by Yoshida et. al., although a symbol replica process is performed in an interference cancellation residual propagation type structure, symbol replicas for individual user signals are handled so as to sequentially estimate propagation paths. Thus, the hardware scale can be reduced and the interference cancellation characteristics can be improved.
FIG. 8 is a block diagram showing an example of the structure of a CDMA multi-user receiving apparatus disclosed by Yoshida et. al as Japanese Patent Laid-Open Publication No. 10-51353. In FIG. 8, the apparatus has a plurality of IEUs 112-m-n disposed on a plurality of stages. IEUs 112-m-n disposed on each stage correspond to individual user signals. An IEU 112-m-n that corresponds to the highest hierarchical level user signal performs an interference canceling process for the lowest hierarchical level user signal on the preceding (m-1)-th stage. An IEU 112-m-n that corresponds to other than the highest hierarchical level user signal performs an interference canceling process for the (n-1)-th hierarchical level user signal. An IEU 112-m-n inputs an error signal obtained in the interference canceling process and an interference replica estimated by the IEU 112-(m-1)-n corresponding to the same hierarchical level user signal on the preceding stage, re-estimates the current m-th stage interference replica, outputs the re-estimated interference replica to an IEU 112-(m+1)-n corresponding to the same hierarchical level user signal on the next (m+1)-th stage, and outputs the result of the diffusing process as the difference between an interference replica on the current m-th stage and an interference replica on the preceding (m-1)-th stage. IEU 112-M-1, . . . , IEU 112-M-N on the last M-th stage output demodulated results as demodulated user signals rather than re-estimating interference replicas on the current M-th stage.
As shown in FIG. 8, the interference canceling process is performed by M column.times.N line circuits (where M represents the number of stages; and N represents the number of user signals). Reception levels of individual user signals are pre-assigned. Each user signal is connected to each stage in series corresponding to a reception level. A demodulating process and an interpolation canceling process are performed for user signals in the order from the highest signal level to the lowest signal level. In this structure, since the interference canceling process is performed in series, interference replicas can be sequentially canceled. Thus, although excellent interference cancellation characteristics are accomplished, the circuit structure is complicated and a delay in the demodulating process is large.
FIG. 9 is a block diagram showing another example of the structure of a CDMA multi-user receiving apparatus. In the receiving apparatus, the delay of the demodulating process is small. The interference canceling process is a simple parallel structure apparatus. The receiving apparatus has multiplying units disposed on the output side of interference estimating units IEU. Each multiplying unit multiplies an output signal of the interference estimating unit by a weighting coefficient .alpha. that is 1 or smaller. Thus, the interference cancellation characteristics are improved.
The CDMA multi-user receiving apparatus shown in FIG. 9 has M stags (where M is any integer that is two or larger) for demodulating N user signals (where N is any integer that is 1 or larger). A first stage interference canceling process circuit 101-1 comprises a delaying unit 103-1, interference estimating units (IEU) 102-1-1 to 102-1-N, multiplying units 105-1-1 to 105-1-N, and a subtracting unit 104-1. The multiplying units 105-1-1 to 105-1-N multiply output signals of the interference estimating units 102-1-1 to 102-1-N by a weighting coefficient .alpha., respectively. The subtracting unit 104-1 subtracts output signals of the multiplying units 105-1-1 to 105-1-N from an output signal of the delaying unit 103-1.
An interference estimating unit (IEU) 102-m-n on the m-th stage (where m is any integer of 1.ltoreq.m.ltoreq.M) for the n-th user signal (where n is any integer of 1.ltoreq.n.ltoreq.N) inputs an interference cancellation residual signal (an output signal of a subtracting unit 104-(m-1)) obtained in the interference canceling process on the (m-1)-th stage and a symbol replica (a replica that is output from an IEU 102-(m-1)-n) corresponding to the same user signal on the (m-1)-th stage, generates an m-th stage symbol replica, outputs the generated symbol replica to the (m+1)-th stage, and outputs a spreaded signal that is the difference between the m-th stage symbol replica and an (m-1)-th stage symbol replica.
A multiplying unit 105-m-n multiplies the output signal of the interference estimating unit 102-m-n by the weighting coefficient .alpha.. A subtracting unit 104-m subtracts the output signals of the multiplying units 105-m-n for all user signals from a signal of which the (m-1)-th stage interference cancellation residual signal is delayed by a delaying unit 103-m for the IEU process, updates the interference cancellation residual signal, and outputs the resultant signal to the (m+1)-th stage.
FIG. 2 is a block diagram showing the structure of the interference estimating unit (IEU) 102-m-n. The IEU 102-m-n has a plurality of path processing portions (#1 to #K) corresponding to a plurality of propagation paths as a multi-path. An inversely spreading means 11 inputs an (m-1)-th stage interference cancellation residual signal (an output signal of a subtracting unit 104-(m-1)). The despreading means 11 performs an despreading process for a signal corresponding to the each path. A first adding unit 12 adds an output signal of the despreading means 11 and an (m-1)-th stage symbol replica (a replica that is output from an IEU 102-(m-1)-n). A detecting unit 13 inputs an output signal of the first adding unit 12. A propagation path estimating means 20 detects a propagation path estimation value corresponding to the each path. A complex conjugate means 21 outputs a complex conjugate value to a multiplying unit 22. The multiplying unit 22 multiplies the complex conjugate value by the output signal of the first adding unit 12 so as to demodulate the signal corresponding to the each path. A second adding unit 14 adds output signals of the detecting units 13 corresponding to the individual paths (#1 to #K). A decision unit 15 determines a symbol of an output signal of the second adding unit 14. A multiplying unit 16 multiplies an output signal of the decision unit 15 by the propagation path estimation value that is output from the propagation path estimating means 20 corresponding to the each path of the paths (#1 to #K) and generates a symbol replica corresponding to the each path. A subtracting unit 17 subtracts an (m-1)-th stage symbol replica from an m-th stage symbol replica. A spreading means 18 spreads an output signal of the subtracting unit 17 corresponding to the current(each) path. A third adding unit 19 adds outputs signals of the spreading means 18 corresponding to the individual paths #1 to #K.
On the first stage, a reception signal as an interference cancellation residual signal obtained in an (m-1)-th stage interference canceling process is used. In addition, on the first stage, zero as a symbol replica corresponding to the same user signal on the (m-1)-th stage is used. On the M-th stage, the interference canceling process is not performed. In addition, spread signals as the difference between m-th stage replicas and (m-1)-th stage replicas are output. Instead, demodulated signals are output.
Generally, the characteristics of a parallel process structure interference canceler are inferior to the characteristics of a serial process structure interference canceler. This is because in the serial structure, the interference canceling process can be performed between user signals on each stage. On the other hand, in the parallel process, the interference canceling process can be sequentially performed.
When the interference canceling process is performed for user signals in the order of the largest signal levels, the characteristics are further improved. In the interference canceler shown in FIG. 9, an output signal of each IEU 102-M-N is multiplies by a real number .alpha. that is 1 or smaller so as to improve the characteristics of the parallel process. The real number .alpha. alleviates the interference canceling process. Thus, all interferences are not canceled on the first stage. Instead, the interferences are gradually canceled on a plurality of stages. In other words, the interference canceling process is alleviated on the first stage that has a large propagation path estimation error and a large determined symbol error. Thus, the interference cancellation error is suppressed. The interference canceling performance is shared with downstream stages that have a small propagation path estimation error and a small determined symbol error. Consequently, the interference cancellation characteristics can be improved.
In the above-described multi-user receiving apparatuses, with a parallel structure, characteristics of a serial interference canceler can be accomplished. However, the characteristics of the conventional multi-user receiving apparatus are not sufficient in comparison with those in the serial structure interference canceler.